The present invention relates to a semiconductor device which requires fine processing, such as a DRAM.
In general, fine manufacturing processing extremely decreases the margin thereof. This tendency is remarkable in memory devices requiring a large capacitance, such as a DRAM.
An existing DRAM cell array pattern has, e.g., a memory cell area and a dummy cell area provided for an outer peripheral portion of the memory cell area, on the two-dimensional plane. The dummy cell area is arranged vertically and horizontally in the memory cell area. Further, the dummy cell area is arranged to suppress the influence of the disturbance of the shape due to the light-near effect which is caused in the outer peripheral portion of the memory cell area. A word driver portion is arranged outside of each dummy cell area indicated above and below in the memory cell area. On the other hand, a sense amplifier portion is arranged on both right and left sides in the memory cell area.
A contact portion (hereinafter, referred to as a contact portion for a word driver forming the word driver portion) connected to each word driver is connected to a word line extending to the memory area via the dummy cell area. On the other hand, each sense amplifier of the sense amplifier portion is connected to a bit line via the dummy cell area.
If the bit line extends in the X direction and the word line extends in the Y direction, each word driver portion is arranged to both end portions of the word line in the Y direction. An area shared by the contact portion for the word drier and the sense amplifier portion inevitably becomes wider than pitches of the memory cell and the word line.
If the contact portion for the word driver having a symmetrical shape to each word line is arranged only to one end portion in the Y direction, the sharing area of the word driver portion is increased because an interval between the adjacent word drivers is sufficiently assured. Thus, the contact portions for the word driver are alternately arranged to both ends of the work line in the Y direction, that is, an alternate construction is adopted.
In the alternate construction, the contact portion for the word driver is arranged to every other word line at one end portion of the word line. The shape of the contact portion for the word driver arranged upstream of the word line is asymmetrical to the center of each word line in the Y direction, and has a pattern extending to one way.
As a result, the contact portion for the word driver has a portion which is opposed, on the plane, to the end portion of the word line positioned on the left of the word line in the contact portion for the word driver. On the other hand, the shape of the contact portion for the word driver arranged downstream for the word line is asymmetrical to the center of each word line in the Y direction, and has a pattern extending to another way in the shown example. Consequently, the contact portion for the word driver has a portion which is opposed, on the plane, to the end portion of the word line positioned on the right of the word line in the contact portion for the word driver.
In the alternate construction, the entire area of the word driver area is reduced and the word driver areas arranged on the top and the bottom of the memory cell area is designed under a common design rule. As compared with the memory area, with the construction, the pattern is thin in the word driver area. In other words, in the above construction, the pattern density changes to a dense one from a thin one at the end portion of the memory cell array.
In the DRAM cell array pattern, the word lines are arranged in the Y direction via an insulating film on a diffusion layer formed like an island in a semiconductor substrate and, on the other hand, the bit lines are aligned in the X direction via the insulating film on the word lines. Further, a counter-electrode made of polysilicon is arranged to the bit line via an interlayer insulating film. The counter-electrode and the diffusion layer forming a part of the memory cell are electrically connected by a storage node contact of a storage node so as to apply a predetermined capacitance to the memory cell formed to a crossing portion of the word line and the bit line. Further, the bit line is connected to the diffusion layer by bit-line contact.
The storage node contact is formed in a contact hole reaching the diffusion layer formed to the semiconductor substrate near the word line and the bit line. Thus, the word line can be sandwiched by two storage node contacts.
It is observed that the fine patterning and the narrow interval between the word lines cause the end portion of the word line to fall or incline. Further, it is observed in detail that only the word line connected to the contact portion for connecting the word driver falls or is inclined. The word line terminated without connection to the contact portion is not inclined.
The falling or inclining portion of the word line is adjacent to the contact portion. Therefore, a sufficient space does not exist in the storage node contact adjacent to the inclining word line and connected to the contact portion. In the worst status, the opening status is observed. As a consequence, contact resistance in the storage node contact increases and the yield of the DRAM thus deteriorates. This is applied to the bit line as well as the word line.